AQA A-Level Computer Science AS Paper 2, June 2025: Question 8

Mark scheme

Show the mark scheme

Qu Pt Marking Guidance Marks

08 1 Mark is for AO2 (application) 1

A + B ;

Qu Pt Marking Guidance Marks

08 2 Marks are for AO2 (application) 3

1 mark for implementation of subexpression X + Y

1 mark for implementation of subexpression (Z ⋅ Y) + X

1 mark for combining subexpressions to form X + Y + (Z ⋅ Y) + X

A. Combining any two subexpressions using + to produce the final output

Max 2 for a circuit that does not correctly implement X + Y + (Z ⋅ Y) + X

DPT. for a circuit that uses logic gates other than AND, OR and NOT

How to answer it

De Morgan’s Laws & Logic Circuit Construction

Topic Overview

What This Question Tests

This question evaluates your foundational knowledge of Boolean algebra rules and your skill at translating mathematical logic statements into hardware schematic diagrams.

De Morgan’s Laws: Converting between grouped negation conjunctions/disjunctions and split individual terms ( A · B = A + B ).
Gate-Level Synthesis: Constructing multi-level logic circuits correctly reflecting precedence/brackets.
Restricted Components: Following hardware constraints precisely by building inverted outputs using only separate AND, OR, and NOT gates (no single-gate NOR or NAND components).

Question 08.1 • 1 Mark (AO2)

Application of De Morgan’s Law

Apply De Morgan’s law to the Boolean expression: A · B

✅ Correct Answer

A + B

1 Mark: Exactly A + B (or equivalent clear overline/negation notation per term joined by an OR symbol).

💡 Key Knowledge

De Morgan’s Laws state:

Rule 1: A · B = A + B (NOT (A AND B) = (NOT A) OR (NOT B))
Rule 2: A + B = A · B (NOT (A OR B) = (NOT A) AND (NOT B))

Rhyme to remember: "Break the line, change the sign."

🧠 Exam Technique

Identify the main operator under the long bar: here it is multiplication (· / AND).
Split the bar over each individual variable ( A and B ).
Flip the operator from AND (·) to OR (+).

❌ Common Errors

Forgetting to change the operator: Writing A · B (leaves the operation unchanged).
Inverting nothing: Writing A + B .
Extending the overline: Keeping one continuous bar A + B , which is completely different.

Question 08.2 • 3 Marks (AO2)

Logic Circuit Construction

Draw a logic circuit for: Q = X + Y + (Z · Y) + X using only AND, OR and NOT gates

📐 Mark Breakdown (3 Marks Total)

Mark 1: Correct implementation of subexpression X + Y using an OR gate followed by a NOT gate connected to inputs X and Y.
Mark 2: Correct implementation of subexpression (Z · Y) + X using:
- An AND gate receiving inputs Z and Y.
- An OR gate combining that AND result with input X.
- A NOT gate inverting the output of that OR gate.
Mark 3: Combining the outputs of both subexpressions using a final OR gate to produce output Q.

🧠 Exam Technique: Step-by-Step Build

Deconstruct the expression into hierarchy:
Top: Part 1 = NOT(X OR Y)
Bottom: Part 2 = NOT((Z AND Y) OR X)
Final: Q = Part 1 OR Part 2
Draw inputs on the left: Clearly label lines from X, Y, and Z. Use filled dots (junctions) when tapping off a signal (like X and Y which are used more than once).
Keep it linear: Work strictly from left to right to prevent tangled, intersecting wire lines.

❌ Critical Penalty Trap (DPT)

DPT (Deficient Performance Penalty): The question specifies "using only AND, OR and NOT gates".
Drawing a single NOR gate (OR shape with an inversion circle on the nose) will trigger a penalty! You must draw an OR gate wired directly into a distinct triangle-and-bubble NOT gate.
Missing the outer bar: Forgetting the inversion on (Z · Y) + X .
Operator confusion: Drawing an AND gate instead of an OR gate for the final junction.

Topics

4.6 Fundamentals of computer systems · 4.6.4 Logic gates · 4.6.5 Boolean algebra